FPGA IMPLEMENTATION OF SOFT OUTPUT VITERBI ALGORITHM USING MEMORYLESS HYBRID REGISTER EXCHANGE METHOD

FPGA IMPLEMENTATION OF SOFT OUTPUT VITERBI ALGORITHM USING MEMORYLESS HYBRID REGISTER EXCHANGE METHOD

R .D. Kadam1 and S. L. Haridas2

1Department of Electronics and Telecomm. BDCE, Sevagram, RTM Nagpur University, India

2Department of Electronics and Telecomm. BDCE, Sevagram, RTM Nagpur University, India

ABSTRACT

The importance of convolutional codes is well established. They are widely used to encode digital data before transmission through noisy or error-prone communication channels to reduce occurrence of errors and memory. This paper presents novel decoding technique, memoryless Hybrid Register Exchange with simulation and FPGA implementation results. It requires single register as compared to Register Exchange Method (REM) & Hybrid Register Exchange Method (HREM); therefore the data trans-fer operations and ultimately the switching activity will get reduced.

KEYWORDS

Traceback method, Register Exchange Method, Hybrid Register Exchange Method, Memoryless HREM. 

Original Source Link : http://aircconline.com/vlsics/V2N3/2311vlsics04.pdf

http://airccse.org/journal/vlsi/vol2.html