MATRIX CODE BASED MULTIPLE ERROR CORRECTION TECHNIQUE FOR N-BIT MEMORY DATA

MATRIX CODE BASED MULTIPLE ERROR CORRECTION TECHNIQUE FOR N-BIT MEMORY DATA

Sunita M.S1 and Kanchana Bhaaskaran V.S2

1VIT University, Chennai Campus, Chennai, India

PESIT, Bangalore, India

2VIT University, Chennai Campus, Chennai, India

ABSTRACT

Constant shrinkage in the device dimensions has resulted in very dense memory cells. The probability of occurrence of multiple bit errors is much higher in very dense memory cells. Conventional Error Correcting Codes (ECC) cannot correct multiple errors in memories even though many of these are capable of detecting multiple errors. This paper presents a novel decoding algorithm to detect and correct multiple errors in memory based on Matrix Codes. The algorithm used is such that it can correct a maximum of eleven errors in a 32-bit data and a maximum of nine errors in a 16-bit data. The proposed method can be used to improve the memory yield in presence of multiple-bit upsets. It can be applied for correcting burst errors wherein, a continuous sequence of data bits are affected when high energetic particles from external radiation strike memory, and cause soft errors. The proposed technique performs better than the previously known technique of error detection and correction using Matrix Codes. 

KEYWORDS

Memory testing, Error correction codes, Matrix codes, multiple error detection, multiple error correction. 

Original Source Link : http://aircconline.com/vlsics/V4N1/4113vlsics03.pdf

http://airccse.org/journal/vlsi/vol4.html