FGMOS BASED LOW-VOLTAGE LOW-POWER HIGH OUTPUT IMPEDANCE REGULATED CASCODE CURRENT MIRROR

FGMOS BASED LOW-VOLTAGE LOW-POWER HIGH OUTPUT IMPEDANCE REGULATED CASCODE CURRENT MIRROR

Abhinav Anand, Prof. Sushanta K. Mandal, Anindita Dash3, B. Shivalal Patro

School of Electronics Engineering, KIIT University, Bhubaneswar, India

ABSTRACT

Floating Gate MOS (FGMOS) transistors can be very well implemented in lieu of conventional MOSFET for design of a low-voltage, low-power current mirror. Incredible features of flexibility, controllability and tunability of FGMOS yields better results with respect to power, supply voltage and output swing. This paper presents a new current mirror designed with FGMOS which exhibit high output impedance, higher current range, very low power dissipation and higher matching accuracy. It achieves current range of up to 1500 µA, high output impedance of 1.125 TΩ, bandwidth of 4.1 MHz and dissipates power as low as 10.56 µW. The proposed design has been simulated using Cadence Design Environment in 180 nm CMOS process technology with +1.0 Volt single power supply.

KEYWORDS

Floating Gate MOSFET, Current Mirror, Regulated Cascode, Low-Voltage & Low-Power 

Original Source Link : http://aircconline.com/vlsics/V4N2/4213vlsics04.pdf

http://airccse.org/journal/vlsi/vol4.html