DESIGN AND IMPLEMENTATION OF ANALOG MULTIPLIER WITH IMPROVED LINEARITY 

Nandini A.S1, Sowmya Madhavan2 and Dr Chirag Sharma3

1Department of Electronics and Communication Engineering, Nitte Meenakshi Institute of Technology, Yelahanka, Bangalore- 560064

2Department of Electronics and Communication Engineering, Nitte Meenakshi Institute of Technology, Yelahanka, Bangalore- 560064

3Department of Electronics and Communication Engineering, Nitte Meenakshi Institute of Technology, Yelahanka, Bangalore- 560064

ABSTRACT

Analog multipliers are used for frequency conversion and are critical components in modern radio frequency (RF) systems. RF systems must process analog signals with a wide dynamic range at high frequencies. A mixer converts RF power at one frequency into power at another frequency to make signal processing easier and also inexpensive. A fundamental reason for frequency conversion is to allow amplification of the received signal at a frequency other than the RF, or the audio, frequency. This paper deals with two such multipliers using MOSFETs which can be used in communication systems. They were designed and implemented using 0.5 micron CMOS process. The two multipliers were characterized for power consumption, linearity, noise and harmonic distortion. The initial circuit simulated is a basic Gilbert cell whose gain is fairly high but shows more power consumption and high total harmonic distortion. Our paper aims in reducing both power consumption and total harmonic distortion. The second multiplier is a new architecture that consumes 43.07 percent less power and shows 22.69 percent less total harmonic distortion when compared to the basic Gilbert cell. The common centroid layouts of both the circuits have also been developed.

KEYWORDS

Multiplier, Gilbert cell, Noise spectral density, Total Harmonic Distortion, Transconductance 

Original Source Link : http://aircconline.com/vlsics/V3N5/3512vlsics08.pdf

http://airccse.org/journal/vlsi/vol3.html