A SYSTEMC/SIMULINK CO-SIMULATION ENVIRONMENT OF THE JPEG ALGORITHM
Walid Hassairi, Moncef Bousselmi, Mohamed Abid and Carlos Valderrama
UMons University of Mons, Electronics & Microelectronics Dpt., Mons, Belgium
Laboratory CES, National School of Engineers of Sfax, Tunisia
ABSTRACT
In the past decades, many factors have been continuously increasing like the functionality of embedded systems as well as the time-to-market pressure has been continuously increasing. Simulation of an entire system including both hardware and software from early design stages is one of the effective approaches to improve the design productivity. A large number of research efforts on hardware/software (HW/SW) co-simulation have been made so far. Real-time operating systems have become one of the important components in the embedded systems. However, in order to validate function of the entire system, this system has to be simulated together with application software and hardware. Indeed, traditional methods of verification have proven to be insufficient for complex digital systems. Register transfer level test-benches have become too complex to manage and too slow to execute. New methods and verification techniques began to emerge over the past few years. Highlevel test-benches, assertion-based verification, formal methods, hardware verification languages are just a few examples of the intense research activities driving the verification domain.
KeyWord
Design, Computer-Aided Design (CAD), Testing, Reliability, Fault-Tolerance, Emerging Technologies, Communications, Video, Security, Sensor Networks, Biological and
Wireless Communications
Original Source Link : http://aircconline.com/vlsics/V3N2/3212vlsics01.pdf
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