DESIGN AND NOISE OPTIMIZATION OF RF LOW NOISE AMPLIFIER FOR IEEE STANDARD 802.11A WLAN
Ravinder Kumar1 , Munish Kumar2, and Viranjay M. Srivastava1
1Department of Electronics and Communication Engineering, Jaypee University of Information Technology, Solan-173234, India.
2Department of Electronics and Communication Engineering, Guru Jambheshwar University of Science and Technology, Hisar-125001, India
ABSTRACT
Low noise amplifier is the front end block of radio-frequency receiver system. Its design required various characteristics such as power gain, noise figure, insertion losses and power consumption. In this paper we have proposed a single stage low noise amplifier design with high gain and low noise using inductive source degeneration topology for frequency range of 3 GHz to 7 GHz and also use the active biasing devices. A range of devices like inductors and capacitors are used to achieve 50 Ω input impedance with a low noise factor. The design process is simulated process is using Advance Design System (ADS) and implemented in TSMC 0.18 µm CMOS technology. A single stage low noise amplifier has a measured forward gain 25.4 dB and noise figure 2.2 dB at frequency 5.0 GHz.
KEYWORDS
Advanced design system, Low noise amplifier, Radio-frequency, Noise figure, Wireless network, CMOS, RF switch, VLSI
Original Source Link : http://aircconline.com/vlsics/V3N2/3212vlsics14.pdf
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