LOW POWER FOLDED CASCODE OTA
Swati Kundra1, Priyanka Soni2 and Anshul Kundra3
1,2FET, Mody Institute of Technology & Science, Lakshmangarh, Sikar-322331, INDIA
3Departmaent of E.C.E, Ambedkar Institute of Technology, New Delhi-110031, INDIA
ABSTRACT
Low power is one of the key research area in today’s electronic industry. Need of low power has created a major pattern shift in the field of electronics where power dissipation is equally important as area, performance etc. Several low power portable electronic equipments, low voltage design techniques have been developed and have driven analog designers to create techniques eg. Self cascode mosfet and stacking technique. For this aim in mind we designed a Folded Cascode using low power techniques and analyzed its various properties through the Spice simulations for 0.13 micron CMOS technology from TSMC and the supply voltage 1.8V.
Keywords
Folded Cascode OTA, Self Cascode, Stacking Technique
Original Source Link : http://aircconline.com/vlsics/V3N1/3112vlsics11.pdf
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