International journal of VLSI design & Communication Systems (VLSICS)

International journal of VLSI design & Communication Systems (VLSICS)

ISSN: 0976 - 1357 (Online); 0976 - 1527 (print)

Webpage URL: http://airccse.org/journal/vlsi/vlsics.html

Energy Efficient Full Adder Cell Design with Using Carbon Nanotube Field Effect Transistors in 32 Nanometer Technology

Ali Ghorbani and Ghazaleh Ghorbani, Islamic Azad University, Iran

Abstract

Full Adder is one of the critical parts of logical and arithmetic units. So, presenting a low power full adder cell reduces the power consumption of the entire circuit. Also, using Nano-scale transistors, because of their unique characteristics will save energy consumption and decrease the chip area. In this paper we presented a low power full adder cell by using carbon nanotube field effect transistors (CNTFETs). Simulation results were carried out using HSPICE based on the CNTFET model in 32 nanometer technology in Different values of temperature and VDD.

Keywords

Low power circuit; Carbon Nanotube Filed Effect Transistors; Nano Transistors; Full Adder

Original Source URL: https://aircconline.com/vlsics/V5N5/5514vlsi01.pdf

Volume URL: https://airccse.org/journal/vlsi/vol5.html

Power Comparison of CMOS and Adiabatic Full Adder Circuits

Y. Sunil Gavaskar Reddy and V. V. G. S. Rajendra Prasad, JNT University, India

ABSTRACT

Full adders are important components in applications such as digital signal processors (DSP) architectures and microprocessors. Apart from the basic addition adders also used in performing useful operations such as subtraction, multiplication, division, address calculation, etc. In most of these systems the adder lies in the critical path that determines the overall performance of the system. In this paper conventional complementary metal oxide semiconductor (CMOS) and adiabatic adder circuits are analyzed in terms of power and transistor count using 0.18UM technology.

KEYWORDS

Low-power, adiabatic logic, Full adder, CMOS, Pass transistor logic, Positive feed back adiabatic logic, Transmission gate logic, SERF adder

Original Source URL: https://aircconline.com/vlsics/V2N3/2311vlsics06.pdf

https://airccse.org/journal/vlsi/vol2.html

Single bit full adder design using 8 transistors with novel 3 transistors XNOR gate

Manoj Kumar1, Sandeep K. Arya1 and Sujata Pandey2

1Department of Electronics & Communication Engineering Guru Jambheshwar University of Science & Technology, Hisar, 125 001, India

2Amity University, Noida, 201303, India

Abstract:

In present work a new XNOR gate using three transistors has been presented, which shows power dissipation of 550.7272µW in 0.35µm technology with supply voltage of 3.3V. Minimum level for high output of 2.05V and maximum level for low output of 0.084V have been obtained. A single bit full adder using eight transistors has been designed using proposed XNOR cell, which shows power dissipation of 581.542µW. Minimum level for high output of 1.97V and maximum level for low output of 0.24V is obtained for sum output signal. For carry signal maximum level for low output of 0.32V and minimum level for high output of 3.2V have been achieved. Simulations have been performed by using SPICE based on TSMC 0.35µm CMOS technology. Power consumption of proposed XNOR gate and full adder has been compared with earlier reported circuits and proposed circuit’s shows better performance in terms of power consumption and transistor count.

Keywords:

 CMOS, exclusive-OR (XOR), exclusive-NOR (XNOR), full adder, low power, pass transistor logic. 

Original Source URL: https://aircconline.com/vlsics/V2N4/2411vlsics05.pdf

https://airccse.org/journal/vlsi/vol2.html

#VLSICircuits #Testing #faulttolerence #reliability #vlsics #AIRCC

A New Full Adder Cell for Molecular Electronics

Mehdi Ghasemi1,2, Mohammad Hossein Moaiyeri1,2, and Keivan Navi1,2

1Faculty of Electrical and Computer Engineering, Shahid Beheshti University G.C., Tehran, Iran.

2Nanotechnology and Quantum Computing Lab, Shahid Beheshti University G.C., Tehran, Iran.

ABSTRACT

Due to high power consumption and difficulties with minimizing the CMOS transistor size, molecular electronics has been introduced as an emerging technology. Further, there have been noticeable advances in fabrication of molecular wires and switches and also molecular diodes can be used for designing different logic circuits. Considering this novel technology, we use molecules as the active components of the circuit, for transporting electric charge. In this paper, a full adder cell based on molecular electronics is presented. This full adder is consisted of resonant tunneling diodes and transistors which are implemented via molecular electronics. The area occupied by this kind of full adder would be much times smaller than the conventional designs and it can be used as the building block of more complex molecular arithmetic circuits.

KEYWORDS

Logic circuits, full adder, nanotechnology, molecular electronics, resonant tunneling diode (RTD)

Original Source URL: https://aircconline.com/vlsics/V2N4/2411vlsics01.pdf

https://airccse.org/journal/vlsi/vol2.html