International journal of VLSI design & Communication Systems (VLSICS)

International journal of VLSI design & Communication Systems (VLSICS)

ISSN: 0976 - 1357 (Online); 0976 - 1527 (print)

Webpage URL: http://airccse.org/journal/vlsi/vlsics.html

Energy Efficient Full Adder Cell Design with Using Carbon Nanotube Field Effect Transistors in 32 Nanometer Technology

Ali Ghorbani and Ghazaleh Ghorbani, Islamic Azad University, Iran

Abstract

Full Adder is one of the critical parts of logical and arithmetic units. So, presenting a low power full adder cell reduces the power consumption of the entire circuit. Also, using Nano-scale transistors, because of their unique characteristics will save energy consumption and decrease the chip area. In this paper we presented a low power full adder cell by using carbon nanotube field effect transistors (CNTFETs). Simulation results were carried out using HSPICE based on the CNTFET model in 32 nanometer technology in Different values of temperature and VDD.

Keywords

Low power circuit; Carbon Nanotube Filed Effect Transistors; Nano Transistors; Full Adder

Original Source URL: https://aircconline.com/vlsics/V5N5/5514vlsi01.pdf

Volume URL: https://airccse.org/journal/vlsi/vol5.html