Thursday 6 June 2019

THE DESIGN OF A LOW POWER FLOATING GATE BASED PHASE FREQUENCY DETECTOR AND CHARGE PUMP IMPLEMENTATION

THE DESIGN OF A LOW POWER FLOATING GATE BASED PHASE FREQUENCY DETECTOR AND CHARGE PUMP IMPLEMENTATION
Md Monirul Islam1 and Ankit Shivhare2
1Department of Electronics Engineering, KIIT University, Bhubaneswar, India
2Department of Electronics Engineering, KIIT University, Bhubaneswar, India

ABSTRACT

A simple new architecture of phase frequency detector with low power and low phase noise is presented in this paper. The proposed phase frequency detector is based on floating gate, consist of 4 transistors including one floating gate pMOS and one floating gate nMOS constructed with two GDI (gate diffusion input) cells and maintain main characteristics of conventional phase frequency detector in 180 nm technology. Floating gate based methodology reduced the power of phase frequency detector about 51%. Introduction of floating gate based phased frequency detector also reduces the number of transistor as compared with conventional phase frequency detector.

KEYWORDS

Phase frequency detector, floating gate MOSFET, Voltage controlled oscillator, Gate diffusion cell, Charge pump. 





No comments:

Post a Comment