SMART MULTICROSSBAR ROUTER DESIGN IN NOC

SMART MULTICROSSBAR ROUTER DESIGN IN NOC 

Bhavana Prakash Shrivastava1 and Kavita Khare2

1Department of Electronics and Communication Engineering, Maulana Azad National Institute of Technology, Bhopal, India

2Department of Electronics and Communication Engineering, Maulana Azad National Institute Of Technology, Bhopal, India

ABSTRACT

This paper gives the innovative idea of designing a router using multicrossbar switch in Network on Chip(NoC) . In Network-on-Chip architectures the input buffer can consume a large portion of the total power. Eliminating all input buffer would result in increased power consumption at high load, while reducing the size of input buffer degrades the performance. In this paper we have proposed a muticrossbar router design using elastic buffer by combining the advantage of both buffered and buffer less network. In the proposed design Power Delay Product is reduced by around 37 .91% as compared to baseline router. 

KEYWORDS

Network on chip, Virtual Channel, Virtual Allocator, Elastic Buffer, Power Delay Product (PDP)

Original Source Link : http://aircconline.com/vlsics/V4N2/4213vlsics07.pdf

http://airccse.org/journal/vlsi/vol4.html