PERFORMANCE EVALUATION OF CDMAROUTER FOR NETWORK - ON - CHIP

PERFORMANCE EVALUATION OF CDMAROUTER FOR NETWORK - ON - CHIP

Anant W. Hinganikar1, Mahendra A. Gaikwad2 and Rajendra M. Patrikar3

1Department of E&T, B.D.College of Engineering, Sevagram (Wardha)-India

2Department of EC, B.D.College of Engineering, Sevagram (Wardha)-India

3Department of EC, VNIT), Nagpur-India

Abstract

This paper presents the performance evaluation of router based on code division multiple access technique (CDMA) for Network-on-Chip (NoC). The design is synthesized using Xilinx Virtex4 XC4VLX200 device. The functional behavior is verified using Modelsim XE III 6.2 C. The delay and throughput values are obtained for variable payload sizes. Throughput-Power and Delay-Power characteristics are also verified for NoC.

Keywords

CDMA, Walsh Code, Router, NoC 

Original Source Link : http://aircconline.com/vlsics/V3N3/3312vlsics07.pdf

http://airccse.org/journal/vlsi/vol3.html