International Journal of VLSI design & Communication Systems( VLSICS )

http://airccse.org/journal/vlsi/vlsics.html

ISSN: 0976 - 1357 (Online); 0976 - 1527(print)

Paper Submission

Authors are invited to submit papers for this journal through E-mail; vlsicsjournal@airccse.org.

Important Dates:

• Submission Deadline : January 04, 2020

Contact Us:vlsicsjournal@airccse.org

Most Viewed Article For An Year In Acadamia

International Journal of VLSI design & Communication Systems (VLSICS)

http://airccse.org/journal/vlsi/vlsics.html

ISSN : 0976 - 1357  (Online); 0976 - 1527(print)

DESIGN AND IMPLEMENTATION OF CAR PARKING SYSTEM ON FPGA

Paper Link:http://aircconline.com/vlsics/V4N3/4313vlsics07.pdf

Acadamia Link:https://www.academia.edu/13091279/DESIGN_AND_IMPLEMENTATION_OF_CAR_PARKING_SYSTEM_ON_FPGA

CALL FOR PAPERS!!

8th International Conference on Signal, Image Processing and Pattern Recognition (SIPP 2020)

March 21~22, 2020, Vienna, Austria

https://ccsit2020.org/sipp/index.html

Important Dates

Submission Deadline : December 29, 2019

Submission Link:
https://ccsit2020.org/submission/index.php

 CONTACT US : sipp@ccsit2020.org or sipp_conf@yahoo.com

SCHOTTKY TUNNELING SOURCE IMPACT IONIZATION MOSFET (STS-IMOS) WITH ENHANCED DEVICE PERFORMANCE

Sangeeta Singh1 , Student Member, IEEE, P.N. Kondekar1 , Member, IEEE

1Nanoelectronics and VLSI Lab., Indian Institute of Information Technology, Design and Manufacturing (IIITDM), Jabalpur - 482005, India

ABSTRACT

In this paper, we propose and investigate a schottky tunneling source impact ionization MOSFET (STSIMOS) with enhanced device performance. STS-IMOS has silicide (NiSi) source to lower the breakdown voltage of conventional impact ionization MOS (IMOS). There is cumulative effect of both impact ionization and source induced tunneling for the current gating mechanism of the device. The silicide source offers immensely low parasitic resistance subsequently there is an increment in voltage drop across intrinsic region. This leads to appreciable lowering of breakdown and threshold voltage for STS-IMOS. Hence, it demonstrates enhanced device performance over conventional IMOS. Besides this for STS-IMOS the location of maximum electric field has shifted towards the source and now it is quite away from gate oxide. Hence, it shows high immunity against Vth fluctuations due to hot electron damage. Consequently, it is found that device reliability is also improved significantly.

KEYWORDS

Impact Ionization, Barrier Tunneling, Subthreshold Slope (SS), Schottky-Contacts

ORIGINAL SOURCE URL: http://aircconline.com/vlsics/V6N3/6315vlsi04.pdf

International Journal of VLSI design & Communication Systems( VLSICS )

http://airccse.org/journal/vlsi/vlsics.html

ISSN: 0976 - 1357 (Online); 0976 - 1527(print)

Paper Submission

Authors are invited to submit papers for this journal through E-mail; vlsicsjournal@airccse.org.

Important Dates:

• Submission Deadline : January 04, 2020

Contact Us:vlsicsjournal@airccse.org

Call for Participation -- December Sydney Conferences 2019
*********************************************************************

We invite you to join us in Sydney, Australia on December 21~22 for 9th International Conference on Advances in Computing and Information Technology (ACITY 2019)

The Conference is a forum for presenting new advances and research results in the fields of Computer Science and Information Technology. The Workshop will bring together leading researchers, engineers and scientists in the domain of interest from around the world.

Highlights of ACITY 2019 include:

• Invited talk from eminent Professors
• Submission of 400 papers from North America to Australia and selection of only
Quality papers
• 9th International Conference on Advances in Computing and Information Technology (ACITY 2019)
• 9th International Conference on Artificial Intelligence, Soft Computing and Applications (AIAA 2019)
• 6th International Conference on Computer Networks & Data Communications (CNDC 2019)
• 10th International Conference on VLSI (VLSI 2019)
• 9th International Conference on Digital Image Processing and Pattern Recognition (DPPR 2019)
• 5th International Conference on Software Security (ICSS 2019)
• 9th International Conference on Peer-to-Peer Networks and Trust Management (P2PTM 2019)
• 11th International Conference on Web services & Semantic Technology (WeST 2019)
• 6th International Conference on Wireless and Mobile Network (WiMNeT 2019)

Registration Participants

Non-Author / Co-Author/ Simple Participants (no paper)

350 USD (With proceedings)

Here's where you can reach us: : acity@cndc2019.org or acityconf@yahoo.com

https://cndc2019.org/acity/contact.html

https://youtu.be/QVkg963w8sw

7th International Conference on Signal and Image Processing (SIGL 2020)

January 25 ~ 26, 2020, Zurich, Switzerland

https://cosit2020.org/sigl/index.html

Important Dates

• Submission Deadline : December 22, 2019
• Authors Notification : January 10, 2020
• Registration & Camera-Ready Paper Due : January 15, 2020

Contact Us

Here's where you can reach us : sigl@cosit2020.org or sigl_conference@yahoo.com

Submission System

https://cosit2020.org/submission/index.php

International Journal of VLSI design & Communication Systems( VLSICS )

http://airccse.org/journal/vlsi/vlsics.html

ISSN: 0976 - 1357 (Online); 0976 - 1527(print)

Paper Submission

Authors are invited to submit papers for this journal through E-mail; vlsicsjournal@airccse.org.

Important Dates:

• Submission Deadline : December 22, 2019

Contact Us:vlsicsjournal@airccse.org

SAF ANALYSES OF ANALOG AND MIXED SIGNAL VLSI CIRCUIT: DIGITAL TO ANALOG CONVERTER

Vaishali Dhare¹ and Usha Mehta²

¹Assistant Professor, Institute of Technology, Nirma University, Ahmedabad

² Senior Member, IEEE, Professor, Institute of Technology, Nirma University, Ahmedabad

ABSTRACT

Digital to analog converter is widely used mixed-signal circuit. Testing of analog and mixed signals faces lots of challenges due to the wide range of circuits and unavailability of one appropriate fault model. SAF (stuck_at_Fault), Stuck_open and stuck_short fault model at transistor level is used in this paper. Further these fault models are used to analyze the effects on the characteristics parameter of 3-bit R-2R DAC.

KEYWORDS

Stuck_open, Stuck_short, testing, DAC, fault.

ORIGINAL SOURCE URL: http://aircconline.com/vlsics/V6N3/6315vlsi05.pdf

VOLUME LINK: http://airccse.org/journal/vlsi/vol6.html

International Journal of VLSI design & Communication Systems( VLSICS ) 

http://airccse.org/journal/vlsi/vlsics.html

ISSN: 0976 - 1357 (Online); 0976 - 1527(print)

Paper Submission

Authors are invited to submit papers for this journal through E-mail; vlsicsjournal@airccse.org. 

Important Dates:

•         Submission Deadline    : December 22, 2019

Contact Us:vlsicsjournal@airccse.org

MINIMALLY BUFFERED ROUTER USING WEIGHTED DEFLECTION ROUTING FOR MESH NETWORK ON CHIP

Simi Zerine Sleeba and Mini M.G.

Department of Electronics Engineering, Government Model Engineering College,

Cochin University of Science and Technology Kochi, India

ABSTRACT

The scalability, modularity and massive parallelism exhibited by Network on chip(NoC) interconnects make them highly suitable for the inter core communication framework of multiprocessor system-on-chip (MPSoC) designs. Routers play the most vital role in transferring flits through the network, hence efficient microarchitecture and cost effective routing algorithms are highly essential for modern NoC routers. Elimination of buffers and deflection routing help to achieve energy and area efficiency of these routers. The advantages of bufferless and buffered designs can be combined by using a minimum number of side buffers to store a fraction of deflection flits in the router. In this paper, we propose a routing algorithm based on weighted deflection of flits for minimally buffered deflection routers. Evaluations on 4x4 and 8x8 mesh NoC using synthetic workloads as well as benchmark applications demonstrate that deflection rate and average network latency are significantly reduced in comparison with the state of the art NoC routers. Performance analysis of the newly proposed algorithm shows that the network saturation point improves by 26% compared to earlier designs in this domain.

KEYWORDS

Network on Chip, Deflection routing, Minimal buffering, Average Latency

ORIGINAL SOURCE URL: http://aircconline.com/vlsics/V6N3/6315vlsi06.pdf

VOLUME LINK: http://airccse.org/journal/vlsi/vol6.html

ADAPTIVE SUPPLY VOLTAGE MANAGEMENT FOR LOW POWER LOGIC CIRCUITRY OPERATING AT SUBTHRESHOLD

Rehan Ahmed

Department of Electrical and Computer Engineering, Oklahoma State University, Stillwater,OK, USA

ABSTRACT

With the rise in demand of portable hand held devices and with the rise in application of wireless sensor networks and RFID reduction of total power consumption has become a necessity. To save power we operate the logic circuitry of our devices at sub-threshold. In sub-threshold the drain current is exponentially dependent on the threshold voltage hence the threshold variation causes profound variation of ION and IOFF the ratio of which affect the speed of a circuit drastically. So to mitigate this problem we present a adaptive power management circuit which will determine the minimum required supply voltage to meet the timing requirement. Also to reduce the power overhead and avoid bulky coil and EMI noise we used the switch capacitor power regulator to regulate and manage power instead of linear dropout (LDO) and Inductor base switch mode power converter.

KEYWORDS Adaptive; Low power; Switch Capacitor; Converter; Sub-threshold

ORIGINAL SOURCE URL: http://aircconline.com/vlsics/V6N2/6215vlsi01.pdf

VOLUME LINK: http://airccse.org/journal/vlsi/vol6.html

6th International Conference on Signal Processing (SP 2020)

February 22~23, 2020, Chennai, India

https://www.cseij.org/sp/index.html

Call for Papers

6th International Conference on Signal Processing (SP 2020) will provide an excellent international forum for sharing knowledge and results in theory, methodology and applications of Signal and Image Processing. The Conference looks for significant contributions to all major fields of the Signal and Image Processing in theoretical and practical aspects. The aim of the conference is to provide a platform to the researchers and practitioners from both academia as well as industry to meet and share cutting-edge development in the field.

IMPORTANT DATES

• Submission Deadline : December 15, 2019

• Authors Notification   : January 25, 2020

• Registration & Camera-Ready Paper Due : January 31, 2020


CONTACT US

Here’s where you can reach us: sp.conf@yahoo.com or spconf@cseij.org

5th International Conference on Data Mining and Applications (DMAP 2019)

December 14~15, 2019, Chennai, India

Volume Editors : Natarajan Meghanathan, Dhinaharan Nagamalai (Eds)

ISBN: 978-1-925953-12-1

Nonnegative Matrix Factorization Under Adversarial Noise 
Peter Ballen, University of Pennsylvania, USA
http://aircconline.com/csit/papers/vol9/csit91601.pdf

Data Model for Bigdeepexaminator
Janusz Bobulski and Mariusz Kubanek, Czestochowa University of Technology, Poland
http://aircconline.com/csit/papers/vol9/csit91602.pdf

Second Order Pseudolikelihood Learning in Relational Domain 
Krishna Kumar Tiwari, V. Vijaya Saradhi, Indian Institute of Technology Guwahati, India
http://aircconline.com/csit/papers/vol9/csit91603.pdf

Regression Testing for Contoso 
Nakush Sharma and Shahid Ali, AGI Institute, New Zealand
http://aircconline.com/csit/papers/vol9/csit91604.pdf

Click Volume Potential Maximization in Affiliate Network 
Krishna Kumar Tiwari and Ritesh Ghodrao, InMobi Technology Services Pvt Ltd, India
http://aircconline.com/csit/papers/vol9/csit91605.pdf

Amharic-arabic Neural Machine Translation 
Ibrahim Gashaw and H L Shashirekha, Mangalore University, India
http://aircconline.com/csit/papers/vol9/csit91606.pdf

Neighbour Alpha Stable Fusion in Wavelet Decomposition and Laplacian Pyramid
Rachid Sabre1 and Ias Wahyuni2, 1University of Burgundy/Agrosup Dijon, France
and 2Universitas Gunadarma, Indonesia
http://aircconline.com/csit/papers/vol9/csit91607.pdf

Precedent Case Retrieval using Wordnet and Deep Recurrent Neural Networks
Sai Vishwas Padigi, Mohit Mayank and S. Natarajan, PES University, India
http://aircconline.com/csit/papers/vol9/csit91608.pdf

***Call for papers***

International Journal of VLSI design & Communication Systems (VLSICS)

http://airccse.org/journal/vlsi/vlsics.html

ISSN : 0976 - 1357 (Online); 0976 - 1527(print)

Paper Submission:

Authors are invited to submit papers for this journal through E-mail vlsicsjournal@airccse.org.

Important Dates:

Submission Deadline : December 14, 2019

Contact Us

Here's where you can reach us : vlsicsjournal@airccse.org

Most Downloaded Article In The Last 30 Days In Acadamia For VLSICS

International journal of VLSI design & Communication Systems ( VLSICS )

http://airccse.org/journal/vlsi/vlsics.html

ISSN : 0976 - 1357 (Online); 0976 - 1527(print)

VERIFICATION OF DRIVER LOGIC USING AMBA- AXI UVM

Paper Link:http://aircconline.com/vlsics/V9N3/9318vlsi03.pdf

Acadamia Link:https://www.academia.edu/36956674/VERIFICATION_OF_DRIVER_LOGIC_USING_AMBA-_AXI_UVM

***Call for papers*** 

 International Journal of VLSI design & Communication Systems (VLSICS) 

 http://airccse.org/journal/vlsi/vlsics.html ;

 ISSN : 0976 - 1357 (Online); 0976 - 1527(print) 

Paper Submission: 

 Authors are invited to submit papers for this journal through E-mail vlsicsjournal@airccse.org. 

 Important Dates: 

 Submission Deadline : December 14, 2019 

 Contact Us 

 Here's where you can reach us : vlsicsjournal@airccse.org

Most Viewed Article In The Current Issue In Acadamia For VLSICS

International journal of VLSI design & Communication Systems ( VLSICS )

http://airccse.org/journal/vlsi/vlsics.html

ISSN : 0976 - 1357 (Online); 0976 - 1527(print)

Design and Analysis of Second and Third Order PLL at 450MHz

Paper Link:http://aircconline.com/vlsics/V2N1/2111vlsics09.pdf

Acadamia Link:https://www.academia.edu/15192142/Design_and_Analysis_of_Second_and_Third_Order_PLL_at_450MHz

FPGA IMPLEMENTATION OF HUANG HILBERT TRANSFORM FOR CLASSIFICATION OF EPILEPTIC SEIZURES USING ARTIFICIAL NEURAL NETWORK

G.Deepika¹ and K.S.Rao²

¹Research scholar at JNTU,Hyderabad , Asso.Prof at RRS college of Engg,

²Director & Professor in ECE Dept,Anurag group of Institutions, Hyderabad

ABSTRACT

 The most common brain disorders due to abnormal burst of electrical discharges are termed as Epileptic seizures. This work proposes an efficient approach to extract the features of epileptic seizures by decomposing EEG into band limited signals termed as IMF’s by empirical decomposition EMD. Huang Hilbert Transform is applied on these IMF’s for calculating Instantaneous frequencies and are classified using artificial neural network trained by Back propagation algorithm. The results indicate an accuracy of 97.87%. The algorithm is implemented using Verilog HDL on Zynq 7000 family FPGA evaluation board using Xilinx vivado 2015.2 version.

KEYWORDS

 EEG, IMF,EMD

Orginal Source URL: http://aircconline.com/vlsics/V10N3/10319vlsi02.pdf

http://airccse.org/journal/vlsi/vol10.html

7th International Conference on Signal and Image Processing (SIGL 2020)

January 25 ~ 26, 2020, Zurich, Switzerland

https://cosit2020.org/sigl/index.html

Contact Us

Here's where you can reach us : sigl@cosit2020.org or sigl_conference@yahoo.com

Submission System

https://cosit2020.org/submission/index.php

Most Viewed Article In The Last 30 Days In Acadamia For VLSICS

International journal of VLSI design & Communication Systems ( VLSICS )

http://airccse.org/journal/vlsi/vlsics.html

ISSN : 0976 - 1357 (Online); 0976 - 1527(print)

UVM_BASED_REUSABLE_VERIFICATION_IP_FOR_WISHBONE_COMPLIANT_SPI_MASTER_CORE

Paper Link:http://aircconline.com/vlsics/V9N5/9518vlsi02.pdf

Acadamia Link:https://www.academia.edu/37718470/UVM_BASED_REUSABLE_VERIFICATION_IP_FOR_WISHBONE_COMPLIANT_SPI_MASTER_CORE

9th International Conference on Digital Image Processing and Pattern Recognition (DPPR 2019)

December 21~22, 2019, Sydney, Australia

https://cndc2019.org/dppr/index.html

IMPORTANT DATES

• Submission Deadline : December 08, 2019 (Final Call)
• Authors Notification :December 15, 2019
• Registration & Camera-Ready Paper Due : December 17, 2019

CONTACT US

Here’s where you can reach us: dppr@cndc2019.org or dpprc@yahoo.com

***Call for papers***

International Journal of VLSI design & Communication Systems (VLSICS)

http://airccse.org/journal/vlsi/vlsics.html    

     

ISSN : 0976 - 1357  (Online); 0976 - 1527(print)

Paper Submission:

Authors are invited to submit papers for this journal through E-mail vlsicsjournal@airccse.org.

Important Dates:

Submission Deadline  : December 07, 2019

Contact Us

Here's where you can reach us : vlsicsjournal@airccse.org