A.Mounica1 and G.V.Subbareddy2
1MTech VLSI Design, Dept of ECE, GRIET Hyderabad, India.
2Associative Professor in Dept of ECE, GRIET Hyderabad, India.
ABSTRACT
The rapid development in wireless networking has been witnessed in past several years, which aimed on high speed and long range applications. There are different protocol standards used for the short range wireless communication namely the Bluetooth, ZigBee, Wimax and Wi-Fi. Among these standards ZigBee is based on IEEE 802.15.4 protocol can meet a wider variety of real industrial needs due to its long-term battery operation and reliability of the mesh networking architecture. The increasing demand for low data rate and low power networking led to the development of ZigBee technology. This technology was developed for Wireless Personal Area Networks (WPAN), directed at control and military applications, where low cost, low data rate, and more battery life were main requirements. This paper presents VerilogHDL simulation of the Top level module (Cyclic Redundancy Check, Bit-to-Symbol block, Symbol-to-Chip block, OQPSK block and Pulse shaping) of the ZigBee transmitter for IoT applications.
KEYWORDS
Cyclic Redundancy Check, Bit-to-Symbol, Symbol-to-Chip, Offset Quadrature Phase Shift Keying Modulator and Pulse Shaping.
ORIGINAL SOURCE URL: https://aircconline.com/vlsics/V8N5/8517vlsi01.pdf
http://airccse.org/journal/vlsi/vol8.html
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