Design of Quaternary Logical Circuit Using Voltage and Current Mode Logic

Shweta Hajare and Pravin Dakhole

Research scholar Department of Electronics Engineering,

Yeshwantrao Chavan college of Engg, Nagpur, India

ABSTRACT

In VLSI technology, designers main concentration were on area required and on performance of the device. In VLSI design power consumption is one of the major concerns due to continuous increase in chip density and decline in size of CMOS circuits and frequency at which circuits are operating. By considering these parameter logical circuits are designed using quaternary voltage mode logic and quaternary current mode logic. Power consumption required for quaternary voltage mode logic is 51.78 % less as compared to binary . Area in terms of number of transistor required for quaternary voltage mode logic is 3 times more as compared to binary. As quaternary voltage mode circuit required large area as compared to quaternary current mode circuit but power consumption required in quaternary voltage mode circuit is less than that required in quaternary current mode circuit.

KEYWORDS

Multiple-Valued Logic (MVL), Quaternary voltage mode, Quaternary current mode, MIN, MAX

ORIGINAL SOURCE URL: https://aircconline.com/vlsics/V8N4/8417vlsi01.pdf

http://airccse.org/journal/vlsi/vol8.html