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International Journal of VLSI design & Communication Systems (VLSICS)
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4th International Conference on Signal Processing, VLSI Design & Communication Systems (SVC 2023)
January 28 ~ 29, 2023, Copenhagen, Denmark
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Submission Deadline : December 31, 2022
#Signalprocessing #VLSIdesign #Communicationsystems #Videoprocessing #Speechprocessing
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International Journal of VLSI design & Communication Systems (VLSICS)
ISSN : 0976 - 1357 (Online); 0976 - 1527(print)
Webpage URL : https://airccse.org/journal/vlsi/vlsics.html
Submission Deadline : December 31, 2022
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4th International Conference on Artificial Intelligence and Big Data (AIBD 2023)
January 28 ~ 29, 2023, Copenhagen, Denmark
https://acsty2023.org/aibd/index
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International Journal of VLSI design & Communication Systems (VLSICS)
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International Journal of VLSI design & Communication Systems (VLSICS)
ISSN : 0976 - 1357 (Online); 0976 - 1527(print)
Website URL:
https://airccse.org/journal/vlsi/vlsics.html
APPROXIMATE ARITHMETIC CIRCUIT DESIGN FOR ERROR RESILIENT APPLICATIONS
Viraj Joshi and Pravin Mane
Department of EEE, Bits Pilani, K.K. Birla Goa Campus, Goa, India
https://aircconline.com/vlsics/V13N6/13622vlsi01.pdf
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12th International Conference on Digital Image Processing and Vision (ICDIPV 2023)
July 29 ~ 30, 2023, London, United Kingdom
https://itcse2023.org/icdipv/index
Submission Deadline: December 24, 2022
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International Journal of VLSI design & Communication Systems (VLSICS)
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Submission Deadline : December 24, 2022
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4th International Conference on Signal Processing, VLSI Design & Communication Systems (SVC 2023)
January 28 ~ 29, 2023, Copenhagen, Denmark
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International Journal of VLSI design & Communication Systems (VLSICS)
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4th International Conference on Artificial Intelligence and Big Data (AIBD 2023)
January 28 ~ 29, 2023, Copenhagen, Denmark
https://acsty2023.org/aibd/index
Submission Deadline: December 17, 2022
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International Journal of VLSI design & Communication Systems (VLSICS)
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Submission Deadline : December 17, 2022
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4th International Conference on Signal Processing and Machine Learning (SIGML 2023)
February 18 ~ 19, 2023, Dubai, UAE
https://ccseit2023.org/sigml/index
IMPORTANT DATES
Submission Deadline : December 10, 2022
Submission link : https://ccseit2023.org/submission/index.php
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International Journal of VLSI design & Communication Systems (VLSICS)
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Submission Deadline : December 10, 2022
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Call for papers...!!!
4th International Conference on Artificial Intelligence and Big Data (AIBD 2023)
January 28 ~ 29, 2023, Copenhagen, Denmark
https://acsty2023.org/aibd/index
Submission Deadline: December 10, 2022
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#SignalProcessing #ImageProcessing #SpeechProcessing #VideoProcessing
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4th International Conference on Signal Processing, VLSI Design & Communication Systems (SVC 2023)
January 28 ~ 29, 2023, Copenhagen, Denmark
https://acsty2023.org/svc/index
Authors are invited to submit papers through the conference Submission System.
Submission URL:https://acsty2023.org/submission/index.php
Submission Deadline : December 03, 2022
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International Journal of VLSI design & Communication Systems (VLSICS)
Webpage URL : https://airccse.org/journal/vlsi/vlsics.html
Submission Deadline : December 03, 2022
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12th International Conference on Digital Image Processing and Pattern Recognition (DPPR 2022)
December 23 ~ 24, 2022, Sydney, Australia
Webpage URL:
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Submission Deadline: December 03, 2022
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Submit your Research Articles!!
International Journal of VLSI design & Communication Systems (VLSICS)
Webpage URL : https://airccse.org/journal/vlsi/vlsics.html
DESIGN AND IMPLEMENTATION OF COMBINED PIPELINING AND PARALLEL PROCESSING ARCHITECTURE FOR FIR AND IIR FILTERS USING VHDL
https://aircconline.com/vlsics/V10N4/10419vlsi01.pdf
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#Design
#VLSICircuits
#ComputerAidedDesign
#LowPower
#PowerAwareDesign
#Testing
#Reliability
#WirelessCommunications
9th International Conference on Signal Processing (CSIP 2022)
December 22 ~ 23, 2022, Sydney, Australia
https://inwes2022.org/csip/index
Submission Deadline: November 26, 2022
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#Signalprocessing,#Imagescanning,#Codingandtransmission,#Imageformation,#Videoprocessing
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International Journal of VLSI design & Communication Systems (VLSICS)
Webpage URL : https://airccse.org/journal/vlsi/vlsics.html
Submission Deadline : November 26, 2022
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#Design
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#Testing #Reliability #Fault-Tolerance
#EmergingTechnologies
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#VLSICircuits
#WirelessCommunications
Submit your Research Articles!!
International Journal of VLSI design & Communication Systems (VLSICS)
Webpage URL : https://airccse.org/journal/vlsi/vlsics.html
DESIGN AND ANALYSIS OF A 32-BIT PIPELINED MIPS RISC PROCESSOR
https://aircconline.com/vlsics/V10N5/10519vlsi01.pdf
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#Design
#VLSICircuits
#ComputerAidedDesign
#LowPower
#PowerAwareDesign
#Testing
#Reliability
#FaultTolerance
#EmergingTechnologies
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#VLSICircuits
#WirelessCommunications
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International Journal of VLSI design & Communication Systems (VLSICS)
Webpage URL : https://airccse.org/journal/vlsi/vlsics.html
Submission Deadline : October 19, 2022
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12th International Conference on Digital Image Processing and Pattern Recognition (DPPR 2022)
December 23 ~ 24, 2022, Sydney, Australia
Webpage URL:
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Submission Deadline: November 12, 2022
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Submission URL:
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International Journal of VLSI design & Communication Systems (VLSICS)
Website URL:
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CONCURRENT TERNARY GALOIS-BASED COMPUTATION USING NANO-APEX MULTIPLEXING NIBS OF REGULAR THREE-DIMENSIONAL NETWORKS, PART III: LAYOUT CONGESTIONFREE EFFECTUATION
https://aircconline.com/vlsics/V11N6/11620vlsi02.pdf
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13th International Conference on VLSI (VLSI 2022)
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December 23 ~ 24, 2022, Sydney, Australia
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International Journal of VLSI design & Communication Systems (VLSICS)
Webpage URL : https://airccse.org/journal/vlsi/vlsics.html
Submission Deadline : October 15, 2022
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International Journal of VLSI design & Communication Systems (VLSICS)
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Submission Deadline : September 17, 2022
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International Journal of VLSI design & Communication Systems (VLSICS)
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Submission Deadline : September 17, 2022
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--------------------------------------
International Journal of VLSI design & Communication Systems (VLSICS)
ISSN: 0976 - 1357 (Online); 0976 - 1527(print)
Webpage URL : http://airccse.org/journal/vlsi/vlsics.html
DESIGN AND PERFORMANCE ANALYSIS OF VARIOUS ADDERS AND MULTIPLIERS USING GDI TECHNIQUE
Simran kaur, Balwinder Singh and D.K Jain
ABSTRACT
With the active development of portable electronic devices, the need for low power dissipation, high speed and compact implementation, give rise to several research intentions. There are several design techniques used for the circuit configuration in VLSI systems but there are very few design techniques that gives the required extensibility. This paper describes the implementation of various adders and multipliers. The design approach proposed in the article is based on the GDI (Gate Diffusion Input) technique. The paper also includes a comparative analysis of this low power method over CMOS design style with respect to power consumption, area complexity and delay. In this paper, a new GDI based cell designs are projected and are found to be efficient in terms of power consumption and area in comparison with existing CMOS based cell functionality. Power and delay has been calculated using Cadence Virtuoso tool at 45nm CMOS technology. The results obtained show better power and delay performance of the proposed designs at 1.3V supply voltage.
KEYWORDS
CMOS, GDI, Adders, Low Power, Digital Design
Full Text URL : https://aircconline.com/vlsics/V6N5/6515vlsi04.pdf
CALL FOR PAPERS...!!!!
International Journal of VLSI design & Communication Systems (VLSICS)
Webpage URL : https://airccse.org/journal/vlsi/vlsics.html
Submission Deadline : September 04, 2022
Submission URL : http://coneco2009.com/submissions/imagination/home.html
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#biomedicalimaging #ComputerVision #remotesensing #videoanalysis #digitalvideo #multispectral #edgedetection
11th International Conference on Digital Image Processing and Vision (ICDIPV 2022)
July 23~24, 2022, Toronto, Canada
https://www.itcse2022.org/icdipv/index
Submission Deadline : July 02, 2022(Final Call)
Submission System: https://www.itcse2022.org/submission/index.php
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Priya Gupta1 and Deepak Gupta2,1Banasthali University, India and 2Alpine System, India
ABSTRACT
This paper describes the design of FPGA based signal processing card. An on board real time digital signal processing system is designed using FPGA. The platform can decode process of various kinds of digital and analog signals simultaneously. The design trend in this card is towards small size, high integration and fast real time processing. For the optimum performance a 16 bit 1 MSPS ADC is used which is interfaced with FPGA to make all the data processing onboard in real time. This card can be used in many signal processing based applications like audio signal processing, audio compression, digital image processing, video compression, speech processing, speech recognition, digital communications by interfacing several separate board using inbuilt I/O’s, each with a number of input channels that will communicate with each other in real time over a high speed communication link. The resulting images can be displayed directly on LCD or OLED panel displays using I/O’s peripherals. The project introduces many challenging issues, which are being addressed in turn with different prototype designs. These issues are the ADC performance, interfacing the ADCs to the FPGA, implementing the flexible processing algorithms and high speed interconnection between the boards.
Original Source URL: https://aircconline.com/vlsics/V2N3/2311vlsics11.pdf
https://airccse.org/journal/vlsi/vol2.html
====================================
Submission Deadline : July 02, 2022
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International Journal of VLSI design & Communication Systems (VLSICS)
ISSN: 0976 - 1357 (Online); 0976 - 1527(print)
https://airccse.org/journal/vlsi/vlsics.html
June 2022: Top 10 Read Articles in VLSI design & Communication Systems
Academia: https://independent.academia.edu/VJournal/
Submission Deadline : June 25, 2022
Contact Us
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#VHDL #VLSI #integratedcircuit #microelectronics #CMOS #medicalelectronics #microprocessors #microcontrollers #opamp
International Journal of VLSI design & Communication Systems (VLSICS)
ISSN: 0976 - 1357 (Online); 0976 - 1527(print)
https://airccse.org/journal/vlsi/vlsics.html
Indexing URL: https://airccse.org/journal/vlsi/indexing.html
Submission Deadline: June 25, 2022
Contact Us
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Academia: https://independent.academia.edu/VJournal
Submission System: http://coneco2009.com/submissions/imagination/home.html
Veena M. B and M. N. Shanmukha Swamy, SJCE, India
ABSTRACT
Growth in technology has led to unprecedented demand for high speed architectures for complex signal processing applications. In 4G wireless communication systems, bandwidth is a precious commodity, and service providers are continuously met with the challenge of accommodating more users with in a limited allocated bandwidth. To increase data rate of wireless medium with higher performance, OFDM (orthogonal frequency division multiplexing) is used. Recently DWT (Discrete wavelet transforms) is adopted in place of FFT (Fast Fourier transform) for frequency translation. Modulation schemes such as 16-QAM, 32-QAM, 64-QAM and 128-QAM (Quadrature amplitude modulation) have been used in the developed OFDM system for both DWT and FFT based model. In this paper we propose a DWT-IDWT based OFDM transmitter and receiver that achieve better performance in terms SNR and BER for AWGN channel. It proves all the wavelet families better over the IFFT-FFT implementation. The OFDM model is developed using Simulink, various test cases have been considered to verify its performance. The DWTOFDM using Lifting Scheme architecture is implemented on FPGA optimizing hardware, speed & cost. The wavelet filter used for this is Daubechies (9, 7) with N=2. The RTL code is written in Verilog-HDL and simulated in Modelsim. The design is then synthesized in Xilinx and implemented on Virtex5 FPGA board and the results were validated using ChipScope.
Keywords:
FFT, DWT, OFDM, BER, Lifting scheme, Simulink
Original Source URL: https://aircconline.com/vlsics/V2N3/2311vlsics10.pdf
https://airccse.org/journal/vlsi/vol2.html
Rehan Maroofi1,V. N. Nitnaware1 and S. S. Limaye2,1Ramdeobaba Kamla Nehru College of Engg, India and 2Jhulelal Institute of Technology, India
ABSTRACT
Traditional System-on-Chip (SoC) design employed shared buses for data transfer among various subsystems. As SoCs become more complex involving a larger number of subsystems, traditional busbased architecture is giving way to a new paradigm for on-chip communication. This paradigm is called Network-on-Chip (NoC). A communication network of point-to-point links and routing switches is used to facilitate communication between subsystems. The routing switch proposed in this paper consists of four components, namely the input ports, output ports, switching fabric, and scheduler. The scheduler design is described in this paper. The function of the scheduler is to arbitrate between requests by data packets for use of the switching fabric. The scheduler uses an improved round robin based arbitration algorithm. Due to the symmetric structure of the scheduler, an area-efficient design is proposed by folding the scheduler onto itself, thereby reducing its area roughly by 50%.
KEYWORDS
Network-on-Chip, System-on-Chip, On-chip routing switch, Scheduler, iSLIP, Synthesis.
Original Source URL: https://aircconline.com/vlsics/V2N3/2311vlsics09.pdf
https://airccse.org/journal/vlsi/vol2.html
ISSN: 0976 - 1357 (Online); 0976 - 1527(print)
http://airccse.org/journal/vlsi/vlsics.html
International journal of VLSI design & Communication Systems (VLSICS) is a bi monthly open access peer-reviewed journal that publishes articles which contribute new results in all areas of VLSI Design & Communications. The goal of this journal is to bring together researchers and practitioners from academia and industry to focus on advanced VLSI Design & communication concepts and establishing new collaborations in these areas.
Authors are solicited to contribute to this journal by submitting articles that illustrate research results, projects, surveying works and industrial experiences that describe significant advances in the VLSI design & Communications.
*
Design
*
VLSI Circuits
*
Computer-Aided Design (CAD)
* Low Power and Power Aware Design
*
Testing, Reliability, Fault-Tolerance
* Emerging Technologies
* Post-CMOS VLSI
* VLSI Applications (Communications, Video,
Security, Sensor Networks,
etc)
*
Nano Electronics, Molecular, Biological and Quantum Computing
* Intellectual Property
Creating and Sharing
* Wireless Communications
Authors are invited to submit papers for this journal through E-Mail: vlsics@aircconline.com or through Submission System. Submissions must be original and should not have been published previously or be under consideration for publication while being evaluated for this Journal.
· Publication Date : Determined by the Editor-in-Chief
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