International Journal Of VLSI Design & Communication Systems ( VLSICS )

In this paper a CMOS operational amplifier is presented which operates at 2V power supply and 1uA input bias current at 0.8 um technology using non conventional mode of operation of MOS transistors and whose input is depended on bias current. The unique behaviour of the MOS transistors in subthreshold region not only allows a designer to work at low input bias current but also at low voltage. While operating the device at weak inversion results low power dissipation but dynamic range is degraded. Optimum balance between power dissipation and dynamic range results when the MOS transistors are operated at moderate inversion. Power is again minimised by the application of input dependant bias current using feedback loops in the input transistors of the differential pair with two current substractors. In comparison with the reported low power low voltage opamps at 0.8 um technology, this opamp has very low standby power consumption with a high driving capability and operates at low voltage. The opamp is fairly small (0.0084 mm2) and slew rate is more than other low power low voltage opamps reported at 0.8 um technology [1,2]. Vittoz at al [3] reported that slew rate can be improved by adaptive biasing technique and power dissipation can be reduced by operating the device in weak inversion. Though lower power dissipation is achieved the area required by the circuit is very large and speed is too small. So, operating the device in moderate inversion is a good solution. Also operating the device in subthreshold region not only allows lower power dissipation but also a lower voltage operation is achieved.

KEYWORDS

Opamp, Adaptive biasing, Low power, Low voltage, Current Substractor.

Original Source URL: https://aircconline.com/vlsics/V1N1/0310vlsics1.pdf

https://airccse.org/journal/vlsi/vol1.html

Monday, 23 August 2021

Call for Papers - International Journal of VLSI design & Communication Systems ( VLSICS )

ISSN: 0976 - 1357 (Online); 0976 - 1527(print)

http://airccse.org/journal/vlsi/vlsics.html

Scope & Topics

International journal of VLSI design & Communication Systems (VLSICS) is a bi monthly open access peer-reviewed journal that publishes articles which contribute new results in all areas of VLSI Design & Communications. The goal of this journal is to bring together researchers and practitioners from academia and industry to focus on advanced VLSI Design & communication concepts and establishing new collaborations in these areas.

Authors are solicited to contribute to this journal by submitting articles that illustrate research results, projects, surveying works and industrial experiences that describe significant advances in the VLSI design & Communications.

Topics of interest include, but are not limited to, the following:

* Design

* VLSI Circuits

* Computer-Aided Design (CAD)

* Low Power and Power Aware Design

* Testing, Reliability, Fault-Tolerance

* Emerging Technologies

* Post-CMOS VLSI

* VLSI Applications (Communications, Video, Security, Sensor Networks, etc)

* Nano Electronics, Molecular, Biological and Quantum Computing

* Intellectual Property Creating and Sharing

* Wireless Communications

Paper Submission

Authors are invited to submit papers for this journal through E-Mail: vlsics@aircconline.com or through Submission System. Submissions must be original and should not have been published previously or be under consideration for publication while being evaluated for this Journal.

Important Dates:

· Submission Deadline : August 28, 2021

· Notification : September 25, 2021

· Final Manuscript Due : October 02, 2021

· Publication Date : Determined by the Editor-in-Chief

Contact Us

Here's where you can reach us : vlsicsjournal@airccse.org or vlsics@aircconline.com or vlsicsjournal@yahoo.com

Wednesday, 18 August 2021

Minimization of Handoff Latency by Co-ordinate Evaluation Method Using GPS Based Map

Debabrata Sarddar1, Joydeep Banerjee1, Souvik Kumar Saha1, Tapas Jana2, Utpal Biswas3, M.K. Naskar1

1. Department of Electronics and Telecommunication Engg, Jadavpur University, Kolkata –700032.

2. Department of Electronics and Communication Engg, Netaji Subhash Engg College, Techno City, Garia, Kolkata – 700152.

3. Department of Computer Science and Engg, University of Kalyani, Nadia, West Bengal, Pin741235

ABSTRACT

Handoff has become an essential criterion in mobile communication system, specially in urban areas, owing to the limited coverage area of Access Points (AP). Handover of calls between two BS is encountered frequently and it is essentially required to minimize the delay of the process. Many solutions attempting to improve this process have been proposed but only a few use geo-location systems in the management of the handover. Here we propose to minimize the handoff latency by minimizing the number of APs scanned by the mobile node (MN) during each handoff procedure. We consider the whole topographical area as a two dimensional plane. By GPS, we can note down the co-ordinates of the MN at any instant. The average rate of change of its latitudinal distance and longitudinal distance with a specific time period is evaluated at the end of the given time period. With the knowledge of the given parameter, it is possible to determine the latitude and longitude of the MN after a particular instant of time. Hence the direction of motion of the MN can be determined which in turns gives the AP towards which the MN is heading towards. This reduces the number of APs to be scanned. Thus, on an overall basis, the handoff latency can be reduced by almost half to one third of its value.

KEYWORDS

IEEE 802.11,GPS (Global Positioning System), trajectory of MN, Neighbor APs, co-ordinate evaluation.

Original Source URL: https://aircconline.com/vlsics/V1N2/0610vlsics4.pdf

https://airccse.org/journal/vlsi/vol1.html

Thursday, 12 August 2021

Two Dimensional Modeling of Nonuniformly Doped MESFET Under Illumination

Dr B.K.Mishra1, Lochan Jolly2 and Kalawati Patil3

1Principal,Thakur College of Engg and Technology, Mumbai, India

2,3Department of Electronics and Telecommunication, Thakur College of Engg and Technology, Mumbai, India

ABSTRACT

A two dimensional numerical model of an optically gated GaAs MESFET with non uniform channel doping has been developed. This is done to characterize the device as a photo detector. First photo induced voltage (Vop) at the Schottky gate is calculated for estimating the channel profile. Then Poisson’s equation for the device is solved numerically under dark and illumination condition. The paper aims at developing the MESFET 2-D model under illumination using Monte Carlo Finite Difference method. The results discuss about the optical potential developed in the device, variation of channel potential under different biasing and illumination and also about electric fields along X and Y directions. The Cgs under different illumination is also calculated. It has been observed from the results that the characteristics of the device are strongly influenced by the incident optical illumination.

KEYWORDS

Optoelectronics, Schottky Junction, Photodetectors, Photovoltage

Original Source URL: https://aircconline.com/vlsics/V1N2/0610vlsics3.pdf

https://airccse.org/journal/vlsi/vol1.html