7th International Conference on Signal and Image Processing (SIGL 2020)

7^th International Conference on Signal and Image Processing (SIGL 2020) 

January 25 ~ 26, 2020, Zurich, Switzerland

https://cosit2020.org/sigl/index.html

Scope & Topics

7^th International Conference on Signal and Image Processing (SIGL 2020) is a forum for presenting new advances and research results in the fields of Digital Image Processing. The conference will bring together leading researchers, engineers and scientists in the domain of interest from around the world. The scope of the conference covers all theoretical and practical aspects of the Signal, Image Processing & Pattern Recognition.

Authors are solicited to contribute to the Conference by submitting articles that illustrate arch results, projects, surveying works and industrial experiences that describe significant advances in the areas of Signal and Image Processing. Topics of interest include, but are not limited to, the following.

Topics of interest include, but are not limited to, the following:

• Image Acquisition & Medical Image Processing
• Pattern Recognition and Analysis
• Visualization
• Face Recognition & Super-Resolution Imaging
• Depend3D and Stereo Imaging
• Application & Others
• Pattern Recognition and Analysis
• Image Coding and Compression
• Face Recognition & Super-Resolution Imaging
• Image Segmentation
• Face Recognition
• 3-D and Surface Reconstruction
• Analog and Mixed Signal Processing
• Applications (Biomedical, Bioinformatics, Genomic, Seismic, Radar, Sonar, Remote Sensing, Positioning, etc
• Array Signal Processing
• Audio/Speech Processing and Coding
• Digital & Mobile Signal Processing
• Statistical & Optical Signal Processing
• Data Mining Techniques
• Motion Detection
• Content-based Image retrieval
• Video Signal Processing
• Array Signal Processing
• Programming Languages
• Audio/Speech Processing and Coding
• Digital & Mobile Signal Processing
• Statistical & Optical Signal Processing
• Data Mining Techniques
• Motion Detection
• Content-based Image retrieval
• Video Signal Processing
• Watermarking
• Detection and Estimation of Signal Parameters
• Signal Identification
• Nonlinear Signals and Systems
• Time-Frequency Signal Analysis
• Signal Reconstruction
• Spectral Analysis
• Sonar Signal Processing and Localization
• Speech, Audio and Music Processing
• Statistic Learning & Pattern Recognition
• Text processing
• Filter Design and Structures
• FIR, IIR, Adaptive Filters
• Watermarking
• Signal Noise Control
• Multiple Filtering and Filter Banks
• Biomedical Imaging Technologies
• Biometrics and Pattern Recognition
• Cognitive and Biologically-Inspired Vision
• Color and Texture
• Communication Signal processing
• Computer Communication and Networks
• Computer Vision & VR
• Constraint Processing
• Distributed Source Coding
• Document Recognition
• DSP Implementation and Embedded Systems
• Face and Gesture
• Hardware Implementation for Signal Processing
• Higher Order Spectral Analysis
• Illumination and Reflectance Modeling
• Image and Video Retrieval
• Image Processing & Understanding
• Image-Based Modeling
• Internet Signal Processing
• Knowledge Repntation and High-Level Vision
• Medical Image Analysis
• Multidimensional Signal Processing
• Multi-view Geometry
• Neural Networks and Genetic Algorithms
• Object Detection, Recognition and Categorization
• Pattern Recognition in New Modalities
• DE for Image Processing
• Performance Evaluation
• Remote Sensing
• Segmentation
• Sensor Array and Multi-Channel Processing
• Shape Repntation
• Signal Processing Education
• Time-Frequency/Time-Scale Analysis
• Video Analysis and Event Recognition
• Video Compression & Streaming
• Video Surveillance and Monitoring

Paper Submission

Authors are invited to submit papers through the conference Submission system by October 19, 2019. Submissions must be original and should not have been published previously or be under consideration for publication while being evaluated for this conference. The proceedings of the conference will be published by Computer Science Conference Proceedings in Computer Science & Information Technology (CS & IT) series (Confirmed).

Selected papers from SIGL 2020, after further revisions, will be published in the special issues of the following journals

• Signal & Image Processing : An International Journal ( SIPIJ )
• International Journal of VLSI Design & Communication Systems ( VLSICS )
• International Journal of Embedded Systems and Applications ( IJESA )
• Information Technology in Industry (ITII) ^New- ESCI(WOS) Indexed

Important Dates

• Submission Deadline : October 19, 2019
• Authors Notification : November 20, 2019
• Registration & Camera-Ready Paper Due : November 28, 2019

Contact Us

Here's where you can reach us : sigl@cosit2020.org

STATIC NOISE MARGIN OPTIMIZED 11NM SHORTED-GATE AND INDEPENDENT-GATE LOW POWER 6T FINFET SRAM TOPOLOGIES

Dusten Vernor, Santosh Koppa and Eugene John

Department of Electrical and Computer Engineering University of Texas at San Antonio, Texas, USA

ABSTRACT

This paper investigates the leakage current, static noise margin (SNM), delay and energy consumption of a 6 transistor FinFET based static random-access memory (SRAM) cell due to the variation in design and operating parameters of the SRAM cell. The SRAM design and operating parameters considered in this investigation are transistor sizing, supply voltage, word-line voltage, temperature and PFET and NFET back gate biasing. This investigation is performed using a 11nm FinFET shorted gate and low power technology models. Based on the investigation results, we propose a robust 6 transistor SRAM cells with optimized performance using shorted gate and independent gate low power FinFET models. By optimizing the design parameters of the cell, the shorted-gate design shows an improvement of read SNM of 261.56mV and an improvement of hold SNM of 87.68mV when compared to a shorted-gate cell with standard design parameters. The low-power design shows an improvement of read SNM of 146.18mV and a marginal decrease in hold SNM of 22.84mV when compared to a low-power cell with standard design parameters. Both the cells with the new optimized design parameters are shown to improve the overall SNM of the cells with minimal impact on the subthreshold leakage currents, performance and energy consumption.

KEYWORDS

SRAM, Leakage Power, Write Delay, Read Delay, FinFET, Static Noise Margin, SNM, Back Gate Biasing.

Orginal Source URL: http://aircconline.com/vlsics/V9N5/9518vlsi01.pdf

http://airccse.org/journal/vlsi/vol9.html

9th International Conference on Digital Image Processing and Pattern Recognition (DPPR 2019)

December 21~22, 2019, Sydney, Australia

https://cndc2019.org/dppr/index.html

Venue : Werrington Park Corporate Centre, Sydney, Australia

Contact Us

Here's where you can reach us : dppr@cndc2019.org or dpprc@yahoo.com

Most Viewed Current Issue Paper for VLSICS in Acadamia

International journal of VLSI design & Communication Systems ( VLSICS )

http://airccse.org/journal/vlsi/vlsics.html

ISSN : 0976 - 1357 (Online); 0976 - 1527(print)  

EFFICIENT ABSOLUTE DIFFERENCE CIRCUIT FOR SAD COMPUTATION ON FPGA

http://aircconline.com/vlsics/V10N2/10219vlsi01.pdf

https://www.academia.edu/40381650/EFFICIENT_ABSOLUTE_DIFFERENCE_CIRCUIT_FOR_SAD_COMPUTATION_ON_FPGA

https://www.academia.edu/40546787/Most_Viewed_Current_Issue_Paper_for_VLSICS

Most Trending Article In Acadamia

International journal of VLSI design & Communication Systems  ( VLSICS )

http://airccse.org/journal/vlsi/vlsics.html

ISSN : 0976 - 1357  (Online); 0976 - 1527(print)

VLSI DESIGN OF AMBA BASED AHB2APB BRIDGE

http://aircconline.com/vlsics/V9N3/9318vlsi02.pdf

https://www.academia.edu/36956498/VLSI_DESIGN_OF_AMBA_BASED_AHB2APB_BRIDGE

Welcome to SPM 2019

6th International Conference on Signal, Image Processing and Multimedia

November 23 ~ 24, 2019, Zurich, Switzerland

https://cseit2019.org/spm/index.html

Submission Deadline :October 05, 2019

Here's where you can reach us : spm@cseit2019.org (or) spmconf@yahoo.com

Submission Link :http://cseit2019.org/submission/index.php

EFFICIENT ABSOLUTE DIFFERENCE CIRCUIT FOR SAD COMPUTATION ON FPGA

Jaya Koshta, Kavita Khare and M.K Gupta

Maulana Azad National Institute of Technology, Bhopal

ABSTRACT

Video Compression is very essential to meet the technological demands such as low power, less memory and fast transfer rate for different range of devices and for various multimedia applications. Video compression is primarily achieved by Motion Estimation (ME) process in any video encoder which contributes to significant compression gain.Sum of Absolute Difference (SAD) is used as distortion metric in ME process.In this paper, efficient Absolute Difference(AD)circuit is proposed which uses Brent Kung Adder(BKA) and a comparator based on modified 1’s complement principle and conditional sum adder scheme. Results shows that proposed architecture reduces delay by 15% and number of slice LUTs by 42 % as compared to conventional architecture. Simulation and synthesis are done on Xilinx ISE 14.2 using Virtex 7 FPGA.

 KEYWORDS

HEVC, motion estimation, sum of absolute difference, parallel prefix adders, Brent Kung Adder.

Orginal Source URL: http://aircconline.com/vlsics/V10N2/10219vlsi01.pdf

http://airccse.org/journal/vlsi/vol10.html