SIMULTANEOUS
OPTIMIZATION OF STANDBY AND ACTIVE ENERGY FOR SUB-THRESHOLD CIRCUITS Ali T.
Shaheen and Saleem M.
R. Taha
Department of
Electrical Engineering, University of Baghdad, Iraq
ABSTRACT
Increased downscaling of CMOS
circuits with respect to feature size and threshold voltage has a result of
dramatically increasing in leakage current. So, leakage power reduction is an
important design issue for active and standby modes as long as the technology
scaling increased. In this paper, a simultaneous active and standby energy
optimization methodology is proposed for 22 nm sub-threshold CMOS circuits. In
the first phase, we investigate the dual threshold voltage design for active
energy per cycle minimization. A slack based genetic algorithm is proposed to
find the optimal reverse body bias assignment to set of noncritical paths gates
to ensure low active energy per cycle with the maximum allowable frequency at
the optimal supply voltage. The second phase, determine the optimal reverse
body bias that can be applied to all gates for standby power optimization at
the optimal supply voltage determined from the first phase. Therefore, there
exist two sets of gates and two reverse body bias values for each set. The
reverse body bias is switched between these two values in response to the mode
of operation. Experimental results are obtained for some ISCAS-85 benchmark
circuits such as 74L85, 74283, ALU74181, and 16 bit RCA. The optimized circuits
show significant energy saving ranged (from 14.5% to 42.28%) and standby power
saving ranged (from 62.8% to 67%).
KEYWORDS
Dual Threshold Design, Slack
Based Genetic Algorithm, Sub-threshold Circuits, Reverse Body Bias, Standby
Power
