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International journal of VLSI design & Communication Systems  ( VLSICS )

http://airccse.org/journal/vlsi/vlsics.html

ISSN : 0976 - 1357  (Online); 0976 - 1527(print)

VERIFICATION OF DRIVER LOGIC USING AMBAAXI UVM

http://aircconline.com/vlsics/V9N3/9318vlsi03.pdf

https://www.academia.edu/36956674/VERIFICATION_OF_DRIVER_LOGIC_USING_AMBA-_AXI_UVM

10th International Conference on VLSI (VLSI 2019)

December 21~22, 2019, Sydney, Australia

https://cndc2019.org/vlsi/index.html

Paper Submission : http://cndc2019.org/submission/index.php

Contact Us :  vlsi@cndc2019.org

International Journal of VLSI design & Communication Systems( VLSICS ) 

http://airccse.org/journal/vlsi/vlsics.html
 

ISSN: 0976 - 1357 (Online); 0976 - 1527(print)

Scope & Topics 

International journal of VLSI design & Communication Systems (VLSICS) is a bi monthly open access peer-reviewed journal that publishes articles which contribute new results in all areas of VLSI Design & Communications. The goal of this journal is to bring together researchers and practitioners from academia and industry to focus on advanced VLSI Design & communication concepts and establishing new collaborations in these areas. 

Authors are solicited to contribute to this journal by submitting articles that illustrate research results, projects, surveying works and industrial experiences that describe significant advances in the VLSI design & Communications. 

Topics of interest include, but are not limited to, the following: 

* Design

* VLSI Circuits

* Computer-Aided Design (CAD)

* Low Power and Power Aware Design

* Testing, Reliability, Fault-Tolerance

* Emerging Technologies

* Post-CMOS VLSI

* VLSI Applications (Communications, Video, Security, Sensor Networks, etc)

* Nano Electronics, Molecular, Biological and Quantum Computing

* Intellectual Property Creating and Sharing

* Wireless Communications

Paper Submission 

Authors are invited to submit papers for this journal through E-mail; vlsicsjournal@airccse.org.  Submissions must be original and should not have been published previously or be under consideration for publication while being evaluated for this Journal. 

Important Dates: 

·         Submission Deadline    : September 28 , 2019

·         Acceptance Notification :October 28, 2019

·         Final Manuscript Due     : November 05, 2019

·         Publication Date : Determined by the Editor-in-Chief

For other details please visit: http://airccse.org/journal/vlsi/vlsics.html

5th International Conference on VLSI and Applications (VLSIA-2019)

November 30 ~ December 01, 2019, Dubai, UAE

https://csty2019.org/vlsia/index.html

Submission Deadline : September 29, 2019

Contact us:

Here's where you can reach us: vlsia@csty2019.org (or) vlsiaconf@yahoo.com

Submission Link:

https://csty2019.org/submission/index.php

MODIFIED MICROPIPLINE ARCHITECTURE FOR SYNTHESIZABLE ASYNCHRONOUS FIR FILTER DESIGN

Basel Halak and Hsien-Chih Chiu

ECS, Southampton University, Southampton, SO17 1BJ, United Kingdom

ABSTRACT

The use of asynchronous design approaches to construct digital signal processing (DSP) systems is a rapidly growing research area driven by a wide range of emerging energy constrained applications such as wireless sensor network, portable medical devices and brain implants. The asynchronous design techniques allow the construction of systems which are samples driven, which means they only dissipate dynamic energy when there processing data and idle otherwise. This inherent advantage of asynchronous design over conventional synchronous circuits allows them to be energy efficient. However the implementation flow of asynchronous systems is still difficult due to its lack of compatibility with industrystandard synchronous design tools and modelling languages. This paper devises a novel asynchronous design for a finite impulse response (FIR) filter, an essential building block of DSP systems, which is synthesizable and suitable for implementation using conventional synchronous systems design flow and tools. The proposed design is based on a modified version of the micropipline architecture and it is constructed using four phase bundled data protocol. A hardware prototype of the proposed filter has been developed on an FPGA, and systematically verified. The results prove correct functionality of the novel design and a superior performance compared to a synchronous FIR implementation. The findings of this work will allow a wider adoption of asynchronous circuits by DSP designers to harness their energy and performance benefits.

KEYWORDS

Asynchronous Design, Finite Impulse Response (FIR) Filter, Hardware Description Language (HDL), FPGA

Orginal Source URL: http://aircconline.com/vlsics/V7N1/7116vlsi01.pdf

http://airccse.org/journal/vlsi/vol7.html

International Journal of VLSI design & Communication Systems( VLSICS ) 

http://airccse.org/journal/vlsi/vlsics.html
 

ISSN: 0976 - 1357 (Online); 0976 - 1527(print)

Scope & Topics 

International journal of VLSI design & Communication Systems (VLSICS) is a bi monthly open access peer-reviewed journal that publishes articles which contribute new results in all areas of VLSI Design & Communications. The goal of this journal is to bring together researchers and practitioners from academia and industry to focus on advanced VLSI Design & communication concepts and establishing new collaborations in these areas. 

Authors are solicited to contribute to this journal by submitting articles that illustrate research results, projects, surveying works and industrial experiences that describe significant advances in the VLSI design & Communications. 

Topics of interest include, but are not limited to, the following: 

* Design

* VLSI Circuits

* Computer-Aided Design (CAD)

* Low Power and Power Aware Design

* Testing, Reliability, Fault-Tolerance

* Emerging Technologies

* Post-CMOS VLSI

* VLSI Applications (Communications, Video, Security, Sensor Networks, etc)

* Nano Electronics, Molecular, Biological and Quantum Computing

* Intellectual Property Creating and Sharing

* Wireless Communications

Paper Submission 

Authors are invited to submit papers for this journal through E-mail; vlsicsjournal@airccse.org.  Submissions must be original and should not have been published previously or be under consideration for publication while being evaluated for this Journal. 

Important Dates: 

·         Submission Deadline    : September 28 , 2019

·         Acceptance Notification :October 28, 2019

·         Final Manuscript Due     : November 05, 2019

·         Publication Date : Determined by the Editor-in-Chief

For other details please visit: http://airccse.org/journal/vlsi/vlsics.html

EFFICIENT ABSOLUTE DIFFERENCE CIRCUIT FOR SAD COMPUTATION ON FPGA

Jaya Koshta, Kavita Khare and M.K Gupta Maulana

Azad National Institute of Technology, Bhopal

ABSTRACT

Video Compression is very essential to meet the technological demands such as low power, less memory and fast transfer rate for different range of devices and for various multimedia applications. Video compression is primarily achieved by Motion Estimation (ME) process in any video encoder which contributes to significant compression gain.Sum of Absolute Difference (SAD) is used as distortion metric in ME process.In this paper, efficient Absolute Difference(AD)circuit is proposed which uses Brent Kung Adder(BKA) and a comparator based on modified 1’s complement principle and conditional sum adder scheme. Results shows that proposed architecture reduces delay by 15% and number of slice LUTs by 42 % as compared to conventional architecture. Simulation and synthesis are done on Xilinx ISE 14.2 using Virtex 7 FPGA.

KEYWORDS

HEVC, motion estimation, sum of absolute difference, parallel prefix adders, Brent Kung Adder.

Orginal Source URL: http://aircconline.com/vlsics/V10N2/10219vlsi01.pdf

http://airccse.org/journal/vlsi/vol10.html

5th International Conference on Signal and Image Processing (SIGI 2019)

November 30 ~ December 01, 2019, Dubai, UAE

https://csty2019.org/sigi/index.html

Submission Deadline : September 08, 2019

Contact Us

Here's where you can reach us : sigi@csty2019.org (or) sigiconf@yahoo.com

Submission Link : https://csty2019.org/submission/index.php

International Journal of VLSI design & Communication Systems( VLSICS ) 

http://airccse.org/journal/vlsi/vlsics.html
 

ISSN: 0976 - 1357 (Online); 0976 - 1527(print)

Scope & Topics 

International journal of VLSI design & Communication Systems (VLSICS) is a bi monthly open access peer-reviewed journal that publishes articles which contribute new results in all areas of VLSI Design & Communications. The goal of this journal is to bring together researchers and practitioners from academia and industry to focus on advanced VLSI Design & communication concepts and establishing new collaborations in these areas. 

Authors are solicited to contribute to this journal by submitting articles that illustrate research results, projects, surveying works and industrial experiences that describe significant advances in the VLSI design & Communications. 

Topics of interest include, but are not limited to, the following: 

* Design

* VLSI Circuits

* Computer-Aided Design (CAD)

* Low Power and Power Aware Design

* Testing, Reliability, Fault-Tolerance

* Emerging Technologies

* Post-CMOS VLSI

* VLSI Applications (Communications, Video, Security, Sensor Networks, etc)

* Nano Electronics, Molecular, Biological and Quantum Computing

* Intellectual Property Creating and Sharing

* Wireless Communications

Paper Submission 

Authors are invited to submit papers for this journal through E-mail; vlsicsjournal@airccse.org.  Submissions must be original and should not have been published previously or be under consideration for publication while being evaluated for this Journal. 

Important Dates: 

·         Submission Deadline    : September 07 , 2019

·         Acceptance Notification :October 07, 2019

·         Final Manuscript Due     : October 15, 2019

·         Publication Date : Determined by the Editor-in-Chief

For other details please visit: http://airccse.org/journal/vlsi/vlsics.html